FROM THE EDITOR
This week we're attending the Embedded Systems
Conference in San Francisco. FPGAs are taking the embedded systems
space by storm, partially because of low-cost platform-enabled
devices like Xilinx's new Spartan-3E, the subject of our first new
feature this week.
Our second article comes from Xilinx and
AccelChip and discusses an approach to high-performance digital
signal processing (DSP) implementation on FPGAs. The key to unocking
the inherent power of DSP on FPGA is the tool and methodology
piece.
Next week, we'll be bringing you a
wrapup of the embedded systems conference as seen through our
FPGA-colored glasses.
Thanks for
reading! If there's anything we can do to make our publications more
useful to you, please let us know at: comments@fpgajournal.com
Kevin Morris –
Editor FPGA and Programmable Logic
Journal |
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CURRENT FEATURE
ARTICLES
Two
Bucks Xilinx Introduces Spartan-3E Plug
and Play Design Methodologies for FPGA-based Signal
Processing by Narinder Lall, Xilinx, Inc. and
Eric Cigan, AccelChip, Inc. Lattice
Launches XP Non-Volatility at the
Forefront of FPGA High-Density
FPGA-to-ASIC Conversions using Structured ASIC: Fills the Gap
by Rick Mosher and Bob Kirk, AMI Semiconductor,
Inc. Breakthrough
Bandwidth SerDes Hits New
Heights Making
the Jump to 10G by Abhijit Athavale and Brian
Seemann, Xilinx, Inc. Co-Verification
Methodology for Platform FPGAs by
Milan Saini, Xilinx, Inc. and Ross Nelson, Mentor
Graphics Simulator
Savvy Getting the Most
From Your HDL The
Impact of Timing Exceptions on FPGA Performance by James Henson, FishTail
Design Automation Inc. Prime-time
Processing Are Embedded Systems on FPGA
Ready? |
Two Bucks Xilinx Introduces
Spartan-3E
For two US dollars, you can buy a bottle of
water from the vending machine in a New York hotel lobby, or you could buy
a single subway token. You could get into a New York taxicab, but you’d
have to get right back out again. If you’re driving your own car, you
could buy one gallon of unleaded gasoline. At most coffee houses, you
could get a cup of plain drip coffee, but not an espresso drink. You could
probably talk to your attorney for about 10 seconds. When it comes right
down to it, two dollars won’t buy you very much. Now, however, it will get
you a Xilinx Spartan-3E 100,000-gate FPGA with 72KB of block RAM, 4 18X18
hard multipliers, and 108 user I/Os.
Xilinx reckons that, within the last seven years, they’ve
dropped the price of a single gate of programmable logic by a factor of
thirty. This more than doubles the not-so-leisurely pace of Moore’s Law.
During the same period, cell-based ASICs have probably fallen behind Mr.
Moore due to skyrocketing NREs (and possibly Mr. Moore’s high-tech running
shoes.) What this means is that the old equation for deciding which device
should be at the center of your new high-volume application has undergone
some major changes. [more]
Plug and Play Design Methodologies for
FPGA-based Signal Processing by Narinder Lall, Xilinx,
Inc and Eric Cigan, AccelChip, Inc
Digital signal processing has traditionally been the
domain of DSP processors and ASICs. Since the late 1990s, FPGAs have
emerged as alternative options for DSP designers. FPGAs are a good fit for
applications that demand higher performance than what DSP processors can
offer, yet do not meet the criteria to justify ASIC economics.
FPGAs Make Their Mark on Signal Processing
FPGAs have evolved from those where DSP structures were built
using logic-only cells to those having dedicated embedded DSP structures,
such as dynamically reconfigurable XtremeDSP slices in Xilinx Virtex-4
FPGAs. Such FPGAs incorporate tremendous parallel processing capability.
For example, new Xilinx Virtex-4 FPGAs support as many as 512 MAC engines,
each capable of providing up to 500MHz throughput. Figure 1 shows how
FPGAs for signal processing have evolved over the years. [more] |